32 圖示 PMOS 場效電晶體電路,電晶體之
【阿中】評論
PMOS 場效電晶體電路 飽和區條件為VDG<=-Vt 故VD-VG<=-(-0.5)VG=VDD*(RG2/RG1+RG2)=5*(2/3+2)=2V所以VD-2<=0.5V =>VD<=2.5V 答案選(C))