問題詳情
【題組】1.2 (2%) In modern computer architectures, TLB is usually involved to improve theefficiency of the memory hierarchy. If we meet a situation of TLB miss, what is thefollowing description true?
(A) The data requested by the CPU must be not in the cache.
(B) The data requested by the CPU must be not in the main memory.
(C) The CPU is failed to get the physical address of the required data.
(D) The CPU must send a request to access the main memory immediately.
參考答案
答案：[無官方正解]
難度：計算中-1
書單：沒有書單，新增