問題詳情
【題組】4.6 Assume the miss rate of an instruction cache is 2% and the miss rate of the data cache is 4%. If100 cycles for all misses, de etermine how ma processor has a CPI (cycle per instruction) of 2 without any memory stalls and the miss penalty ismuch faster a proce cessor would run with a perfect cache thatnever missed. Assue the frequency of all loads and stores is 36%.
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