【題組】4.7 Suppose that in 1000 memory references, there are 40 misses in the first-level cache and 20misses in the second-1 level cache. Assume the miss pen nalty from L2 cache to memo ory is 200 clockcycles, the hit time of L2 cache is 10 clock cycles, and the hit time of Ll cache is 1 clock cycle. Whatis the average memory y access time? Hint: average memory access time = LI_hit_time +Ll miss rate * ( 12 hit time + L2 local_miss_rate * * L2 miss penalty ) where the12 local miss_rate is the nunber of misses in L2 cache divided by the total numnber of memoryaccesses to L2 cache.