【題組】(b) (10%) Assuming the five-stage instruction pipeline with a single-cycle delayed branch andnormal forwarding and bypassing hardware, schedule the instructions in the loop includingthe branch-delay slot. You may reorder instructions and modify the individual instructionoperands, but do not undertake other loop transformations that change the number of op-code of instructions in the loop. Show a pipeline timing diagram and compute the number ofcycles needed to execute the entire loop.