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• 48. 以下哪項屬於單殼散裝船，散裝固體貨物運輸中易產生的危險？ (A)由於貨物重量分配的不合理，而造成繫固裝置的損壞 (B)由於平艙不當或貨物重量分配不合理，而使船舶俯仰差異常 (C)在運輸潮濕狀態
• 49. 以下何項，不屬於油類記錄簿第一部份的記載項目？ (A)燃油艙的壓載或清洗 (B)燃油艙不潔壓艙水或洗艙水的排放 (C)污油艙內水的排放 (D)燃油艙殘油(油泥)的處理
• 50. 以下何項，是正確描述貨櫃的櫃碼標示組成？ (A)四個英文字母加六個數目字，再加一個數字為檢查碼 (B)三個英文字加上四個數字 (C)二個英文字加上五個數字 (D)四個英文字母加五個數目字，再加
• 1. 測量手臂長度為75.3公分,哪一個數字為估計值? (A)7 (B)5 (C)3 (D)75
• 6.Calculate the wavelength of the light emitted by a hydrogen atom during a transition of its electr
• 5. Given a UNIX i-node with ten direct blocks and three levels of indirect blocks (ie, a single, a d
• 6. Suppose that a disk drive has 1024 cylinders, numbered from 0 to 1023. The drive is currently ser
• 【題組】(b) SCAN
• 7. What are the necessary conditions for a deadlock to occur in a system?
• 8. (a) Explain what "Confidentiality", "Integrity'", and "Availability
• (b) Explain what "Botnet" and "Malware" means.
• (c) Please explain what is "Digital Envelope" and how it works.
• (d) Explain the main techniques used to construct "Bitcoin" and its main network, and what
• 1. 全民國防是結合平時與戰時的國防，戰時則實施　(A)全民精神動員　(B)集體精神動員　(C)全民防衛動員　(D)全國人民動員 快速動員後備、民力、物力和精神力，以發揮全民力量，爭取防衛作戰勝利。
• 【題組】1.6 What is the representable range of the single-precision floating-point numbers?
• 【題組】1.7 Is the distance between two neighboring singlo-precision foating-point numbers the same?
• 【題組】1.8 For a 32-bit two's complement signed fixed-point rep presentation with 16 integer bits
• 【題組】1.9 Continued with the previous 32-bit signed fixed-point representation, what is the representa
• 【題組】1.10 In general, addition of two 32-bit fixed-point numbers can be finished in one clock cycle.H
• 2. 2.1 A processor is busy with computation 40% of aputation 40% of the execution time, and is waiti
• 2.2 If you want to achieve a speedup of 80 for a computation task using 100 processots runningconcur
• 2.3 For an application program running on a multi-processor system with 32 processors, it takes200 n
• 2.4 Assume that 25% operations of a computation task are floating-point operations and averageCPI (c
• 3.A standard pipelined CPU contains five pipeline stages: instruction fetch (IF), instruction decode